research
Hardware security, side-channel attacks, and FPGA cloud security.
Research Interests
My research interests span the areas of hardware security, computer architecture, and reconfigurable computing. Specifically:
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Side-Channel Attacks — Exploiting information leakage from power consumption, electromagnetic emissions, and microarchitectural state to extract secret data from hardware.
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Embedded Power Sensing — Designing on-chip sensors (Ring Oscillators, TDCs, carry-chain sensors) that capture power supply variations through the Power Distribution Network, enabling remote observation of microarchitectural behavior without external probes.
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Cache and Coherence Attacks — Studying how cache coherence protocol decisions leak through on-chip power measurements on heterogeneous SoC-FPGA platforms.
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FPGA Security in Multi-Tenant Cloud — Investigating leakage risks from shared hardware resources, co-location detection, and stealthy sensor circuits in reconfigurable cloud computing scenarios.
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Machine Learning for Security — Applying ML-based analysis to multi-source side-channel data for both attack exploitation and runtime detection of malicious activity.
PhD Thesis
Towards Secure FPGA-Accelerated Clouds: Identification, Exploitation, and Mitigation of Hardware Vulnerabilities
Université de Rennes / IRISA / Inria / SUSHI Team (CentraleSupélec), 2024–present.
Supervisors
- Rubén Salvador — CentraleSupélec, Inria, CNRS, IRISA
- Thomas Rokicki — CentraleSupélec, Inria, CNRS, IRISA
- Maria Méndez Real — Univ Bretagne-Sud, Lab-STICC
- Alessandro Palumbo — CentraleSupélec, Inria, CNRS, IRISA
- Lilian Bossuet — Univ Lyon, UJM-Saint-Étienne, CNRS, Laboratoire Hubert Curien
Current Visiting Position
ISEC, TU Graz (2026) — On-site collaboration with Daniel Gruss’s group on side-channel attacks on SoC devices.